Read-only memories (ROMs) are a type of memory in which data can be permanently stored, for example, by blowing metallic links during programming thereof. Such type of memory can be conventionally accessed at specific locations to read the programmed contents thereof. A much more versatile type of ROM is the electrically programmable read-only memory (EPROM) which can be electrically programmed to permanently store data. No fusible links, or the like, are blown, as is the case with the noted ROMs, to permanently establish data therein. EPROMs rely on a charge tunnelling phenomenon to permanently store a charge in an electrical conductor of each cell. Avalanche and Fowler-Nordheim effects are examples of the tunnelling phenomenon. Essentially, an EPROM cell is programmed by applying certain voltages thereto, sufficient to draw electron charges through a thin insulator and become trapped in a conductive material. The conductive material can be polycrystalline silicon (polysilicon) or silicon nitride. The voltages applied to the cell for reading the contents thereof are insufficient to release the trapped charges, and thus once electrically programmed, the cell retains the information for a long period of time.
The construction of an EPROM cell is similar to that of a field effect transistor, but additionally includes a floating gate between the gate conductor and the conduction channel of the transistor. During programming to store a desired logic state, electrons flowing in the conduction channel are attracted and trapped in the floating gate. This condition increases the threshold voltage of the transistor, thereby rendering it cutoff in response to normal read operation voltages. Hence, during reading of a transistor cell so programmed, the transistor will remain nonconductive and thus represent a high impedance between the source and drain terminals which also comprise bit lines. When it is desired to store another digital state in the cell, such cell is simply not programmed, and thus no charge is retained in the floating gate. The nonprogrammed transistor cell is thus characterized with a normal threshold voltage, and is responsive to read operation voltages by being driven into conduction and exhibiting a low impedance between the bit lines.
In the semiconductor memory technology, there is a constant effort to construct devices with higher switching speeds and with higher circuit densities to accommodate more cells per unit of wafer area. The development of EPROM memories are no exception, and indeed, EPROM cells have been scaled so that the geometry thereof is reduced to the extent that a one megabit EPROM memory array is feasible. One problem attendant with the scaling of EPROM cells is that with smaller gate conductors and correspondingly smaller floating gates, the coupling efficiency thereof is reduced. Therefore, a programmed cell of this type exhibits a lower threshold due to fewer charges being trapped in the floating gate. This can be overcome by increasing the programming voltage, or the programming time in which free carriers are collected and retained in the floating gate. Both such measures are suboptimal, in that with higher programming voltages the geometric dimensions of some of the cell features are required to be increased for voltage breakdown purposes. By requiring a longer programming time of each cell, it is apparent that the additive effect thereof requires a substantially longer programming time for the array, especially in one megabit memory arrays.
From the foregoing, it can be seen that a need exists for an EPROM cell and memory array, and method of fabrication thereof, which provides a greater coupling efficiency between the control gate and the floating gate without compromising other features of the memory. An associated need exists for an EPROM cell having a greater common lateral area between the control gate and floating gate, without increasing the dimensions of the cell itself. A more particular need exists for an EPROM memory cell having such improved coupling efficiency without requiring additional complicated fabrication masks or steps.